Field
The present invention relates to a method for manufacturing a semiconductor device.
Background
A power semiconductor device (power device) such as an IGBT (insulating gate type bipolar transistor) and a MOSFET (MOS-type field-effect transistor) is widely used as an inverter circuit for an industrial motor, a motor for automobile, and the like, a power supply for a large capacity server, and a semiconductor switch of an uninterruptible power supply, for example.
In a front and back conductive power semiconductor device, a semiconductor substrate is made thin in order to improve an energizing performance as typified by the on-characteristic. Recently, in order to improve the cost performance and characteristics, a semiconductor device is manufactured by means of an ultra-thinning wafer process which makes a wafer thin on the order of 50 μm from a wafer material produced by a FZ (Floating Zone) method.
On the other hand, when such a front and back conductive power semiconductor device is mounted on a circuit board, the power semiconductor device has been electrically connected to the circuit board by soldering the back side surface thereof on the circuit board and wire bonding the front side surface thereof by an Al wire. In recent years, thanks to the improvement of energizing performance of a power semiconductor device, the configuration is emerging which improves energizing performance and heat radiation capability of a power semiconductor module to which a power semiconductor device is incorporated by soldering both the surfaces. Therefore, an Ni (nickel) film at several μm (micron) level for soldering is required to be provided on an electrode layer which is formed on the front surface side of the power semiconductor device. A vacuum film forming method such as deposition or spattering has a low film forming rate, and thus still has a problem of productivity and manufacturing cost. Therefore, plating which is a wet film forming method capable of forming a film at a high speed is attracting attention.
However, due to the trend of thinning of a wafer and thickening of the film thickness of an electrode described above, the problem arises that warpage of a wafer occurs during a wafer process. Specifically, if a wafer edge comes into contact with an unexpected location while handling a wafer, chipping or breakage of the wafer occurs. This causes a problem of deterioration in yield, resulting in increase in manufacturing cost.
In order to prevent the warpage of a wafer, the following technique has been offered (see Japanese Patent Laid-Open No. 2011-222898, for example). When a back electrode is formed on the back surface of the semiconductor wafer by means of vacuum film formation, the semiconductor wafer is in such a state as deflected to protrude to the front surface side due to the stress based on the difference in temperature at the time of forming a film of the back electrode. Next, the back surface of the semiconductor wafer is subjected to a plasma treatment to remove deposits which have been deposited on the back surface of the semiconductor wafer. Then, in order to prevent the back electrode from being contaminated and suppress warpage of the wafer at the time of plating treatment, a peeling tape is stuck on the back surface of the semiconductor wafer along the warpage of the semiconductor wafer. The semiconductor wafer is kept in a state of being deflected to protrude to the front surface side even after the peeling tape is stuck. Next, a plating film is formed on the front surface of the semiconductor wafer by means of electroless plating treatment. Then, the peeling tape is peeled off from the semiconductor wafer. After that, a semiconductor chip is cut out from the semiconductor wafer.
However, in the technique disclosed in Japanese Patent Laid-Open No. 2011-222898, it is difficult to manage manufacturing conditions for maintaining the quality stably, such as a condition for forming a film, a condition for sticking a tape, etc. Furthermore, in order to protect the back electrode, the number of processes is increased by adding the stages of sticking and peeling off a tape to and from a wafer. This inevitably increases the number of handling the wafer, thereby increasing the possibility of breakage of a wafer resulted therefrom. Furthermore, if there is the remaining tape material on the back electrode after the tape is peeled off, the defective rate at the time of assembling also increases. For these reasons, the problem exists that it is difficult to reduce the manufacturing cost.